The present invention is directed to a ferroelectric capacitor and method for forming the same.
The current method for producing ferroelectric capacitors for integrated ferroelectric memories involves depositing a single layer of a ferroelectric/dielectric material between a bottom electrode and a top electrode. See U.S. Pat. Nos. 4,918,654 ("SRAM With Programmable Capacitance Divider") and U.S. Pat. No. 5,005,102 ("Multilayer Electrodes For Integrated Circuit Capacitors") assigned to Ramtron Corporation, the assignee of the present invention. The result is a capacitor having a bottom electrode, a single layer of ferroelectric material, and a top electrode. A problem with this configuration is that if a defect is somehow introduced to either the bottom electrode or the ferroelectric layer, such as during the deposition process or during subsequent processing, the defect may propagate through the entire structure. A defect propagates as either the bottom electrode or ferroelectric layer is deposited or as the ferroelectric layer is annealed and undergoes a phase transformation.
A defect can cause an electrical short between the top and bottom electrodes and thereby render the capacitor useless. Furthermore, the existence of such a defect in the capacitor can lead to instability in the electrical properties of the capacitor, for example in the breakdown voltage, leakage current, and dielectric constant. Hence, such a defect will cause the electrical properties of the capacitor to be degraded.
A defect such as described above is a frequent occurrence in the capacitor production process. In fact, unwanted defects are typically the single largest yield limiter in the production process. As a result, manufacturing yield is decreased which affects the product manufacturing costs. Therefore, defects cause a great deal of wasted time, effort, and money for a manufacturer.
In commercial integrated circuit memory devices, a large number of capacitors are fabricated and incorporated into each device. In order for the memory device to operate properly, each capacitor must possess good electrical characteristics. Therefore, a random defect, which degrades the electrical performance of one capacitor, will also degrade the electrical performance of the memory device and result in a defective memory device. Accordingly, the probability of making a good memory device is greatly dependent on the effect of these random defects.
The object of the present invention is to provide a ferroelectric capacitor which decreases the probability of a random defect impacting the quality of the ferroelectric memory device.